In Frequency-Modulated Continuous Wave (FMCW) automotive radar systems, the frequency of the transmitted signal is controlled by a voltage controlled local oscillator (VCO) and accurate run time monitoring of the VCO frequency is crucial for such systems.
In a FMCW automotive radar system, the transmitted signal (e.g. a 76 to 77 GHz mm-Wave sine wave with linear frequency modulation chirp) is controlled by a voltage controlled oscillator (VCO). In such a system, one of the mandatory functions is the ability for run-time monitoring of the VCO frequency with sufficient accuracy for the purpose of built-in self-test and functional safety requirements of automotive applications. A conventional approach to monitoring VCO frequency is illustrated in FIG. 1. Firstly the frequency of the VCO output signal 110 (e.g. ˜27 GHz) is scaled down by a clock divider 120 (e.g. by a factor of 512, to a frequency around 50 MHz). The output signal 125 of the divider 120 is filtered 130 to remove its harmonics from its fundamental signal. After that, the filtered signal 135 is digitized by an analogue-to-digital converter (ADC) 140 for further digital signal processing to estimate the frequency of the VCO output signal 110.
A problem with this conventional approach for monitoring the frequency of a VCO output signal is that the output waveform 125 of the divider 120 is a square wave (or a heavily distorted sine wave), and so it has very strong harmonic tones close to the fundamental tone (especially the third order harmonic tone). In order to estimate the frequency of the VCO output signal 110 accurately, these harmonics of the divider output signal 125 need to be sufficiently filtered out in accordance with the system requirements, which can require a very complex high order analogue filter in order to have enough suppression of the harmonics to fulfil stringent accuracy requirements. For example, in a FMCW automotive radar system, the requirements for the analogue filter may be:                passband: 45-55 MHz, ripple <2 dB; and        stopband: attenuation >70 dB for f>150 MHz.        
The 70 dB suppression on the 3rd harmonic is a tough specification and a 9th order Butterworth filter is typically required to achieve such suppression. For such a complex filtering function, it is very difficult and cost ineffective to be implemented in advance CMOS technology due to the noise, bandwidth and linearity performance typically required resulting in large power and area penalties to implement. Consequently, such a complex filtering function is typically implemented on a separate chip with a dedicated technology, often based on Cauer or Sallen-Key topologies and requiring many bulky passive components or multiple high gain and low noise amplifiers as well as calibration or trimming to maintain the desired filter characteristics over PVT (process voltage temperature) variations.